Summary

A motivated, Hardworking student and a passionate learner eagerly pursuing an Internship with an opportunity to expand my knowledge in analog/RF Integrated Circuit design with real-world experience. Outgoing and friendly with a strong drive to analyze complex problems and design the technology of the future.

Birthdate

June 29, 1999

Gender

Male

Nationality

Egyptian

Residence

36 Nozha St. Ard el Golf - Cairo, Egypt

Military status

Exempted

Education

Faculty of Engineering, Ain Shams University

Electronics & Communications

2017 - 2022

  • Preparatory year grade: 86%
  • 1st year grade: 91.2%
  • 2nd year grade:91.3%
  • 3rd year grade:92.67%

Cumulative Grade: 90.13% (Ranked 4th on my class)

Information Technology Institute

2020 - 2020

Analog Integrated Circuit design

Grade: 98%

Nefertari International School

Math Section

2003 - 2017

Grade: 97%

Projects

A 3.2 GS/s FIR DAC for a massive MIMO 5G transceiver

Granduation Project (undergoing)

Design flow:

1-Literature survey of RF vs FIR DACs for suitable implementation in the 28 Ghz sub band

2-System design of the chosen FIR DAC on matlab and simulink.

3-circuit level design of the FIR DAC and verification with system level matlab model.

High Precision low voltage bandgap reference

Design of a high precision low voltage bandgap reference circuit that could be powered down by a control signal. The circuit was designed using cadence tools in TSMC 65 nm technology and was verified against corners and mismatch variations (Monte Carlo). The circuit delivers a constant Vref = 500 mV and Iref = 10 uA with a (±3% PVT variation) and (±4% mismatch variations) and a PSRR = -60 dB @ DC . the startup time of the circuit is < 1us . The circuit was optimized to minimize the power consumption and area.

7- bit segmented current steering DAC

Designed a 7-bit segmented current steering DAC including the custom digital flipflops and encoder. The designed DAC accomplished an SFDR of 59 dB.

Design of fully differential folded cascode OTA with Common mode feedback loop

Designed the fully differential folded cascode to meet required specs (current consumption, DC loop gain, phase margin, differential output swing, closed loop bandwidth, CMIR)

Design of two stage frequency compensated miller OTA

Designed the two stage miller OTA to meet required specs (e.g. : CMIR ,static gain error, phase margin, GBW ,slew rate, current consumption)

Full custom 4-BIT ARITHMETIC & LOGIC UNIT

Designed ALU to perform 16 basic signed operations (AND, OR, NOR, Addition, Subtraction, Multiplication, Transfer, NAND, ... etc. ), while minimizing the area and power consumption.

Skills

  • Industry Knowledge

    Analog IC design

    Cadence Virtuoso

    Orcad Pspice

    NI Multisim

    Matlab

    Ansoft Designer

    HFSS

  • Software Tools & Technologies

    C & C++

    Microsoft word

    Microsoft Powerpoint

  • Interpersonal Skills

    Complex problem solving

    Teamwork

    Team Leadership

    Detail oriented

    Passionate learner

Courses and Certificates

Analog IC design

Information Technology Institute

A 90-hour design oriented Course for basic analog integrated Circuit design building blocks supervised by Dr. Hesham Omran

Languages

Language

Arabic

Mother Tongue

Language

English

Fluent