Summary

Experienced Validation Engineer with 3 years of expertise in pre and post-silicon functional validation at the IP level for SOCs. Proven track record at Pentagon Global Solutions Pvt Ltd, skilled in C-based content development, power management validation, and usage of advanced debugging tools.

Years of Experience

3 years

Graduation Year

2021

Title

Validation Engineer

Graduated From

Kalasalingam Academy of Research and Education

Nationality

Indian

Work Experience

PENTAGON GLOBAL SOLUTIONS PVT LTD

Validation Engineer

November 2021 - June 2024

  • Worked on end-to-end SOC silicon validation life cycle.
  • Developed and modified test cases through C-based content development.
  • Involved in Bringing up the new Silicon/SOC.
  • Work experience on post-silicon functional validation of features of SPI and I2C.
  • Worked extensively with 8, 16, and 32-bit SOCs.
  • Experience in understanding the work point of my IP.
  • Experience using IDE/tools like Keil μVision till v5.0 IDE, GNU Tools: GCC, GDB debugger.
  • Involved in Power Management Validation.
  • Sound Knowledge of the booting process of SOC.
  • Sound Knowledge of CAN and UART Communication Protocols.
  • Experience in usage of software tools like Beyond Compare, and Meld.
  • Good understanding of board-level hardware schematics.
  • Testing the hardware boards with DMM, an Extensively used configuration tool.
  • Hands-on experience in using the Software version Control tool GIT.
  • Knowledge of the HAPS Emulation platform.
  • Hands-on Experience in ZEBU and FPGA Emulation Platforms.
  • Debugging the test cases using a JTAG debugger, Logical Analyzer, Protocol analyzer, DMM and TRACE 32.
  • Familiar with Make, Make File, and Compilation Process.
  • Raising the tickets for issues and tracking them till they get resolved.
  • Actively interacted with Lab technicians for rework required for my IP's for testing.
  • Worked on Windows and Linux Operating System.
  • Passion to learn new technology every day, and dive to getting things done.
  • Good teamwork spirits.

Projects

Pre and Post-Silicon Validation of EMMC

Validation Engineer

Project 4: Pre and Post-Silicon Validation of EMMC

Objective: Validate EMMC specifications.

Responsibilities: Explored EMMC specifications, reviewed and altered validation features, interacted with lab technicians.

Achievements: Validated card detection and initialization, host initialization, command testing.

Pre and Post-Silicon Validation of SD Host Controller

Validation Engineer

Project 3: Pre and Post-Silicon Validation of SD Host Controller

Objective: Validate SD Host specifications.

Responsibilities: Reviewed SD specifications, developed test cases, created test plans.

Achievements: Validated SD card detection, host and card initialization, PIO data transfer, SDMA transfers.

Pre and Post-Silicon validation on SPI bus various slaves

Validation Engineer

Project 2: Pre and Post-Silicon Validation on SPI bus various slaves

Objective: Validate SPI bus specifications.

Responsibilities: Reviewed SPI specifications, developed test plans, executed test cases.

Achievements: Validated data transfer speeds, loopback, word size, clock polarity, and mode selection.

Pre and Post Silicon Validation on I2C controller with various slaves

Validation Engineer

Project 1: Pre and Post Silicon Validation on I2C controller with various slaves

Objective: Validate I2C controller specifications.

Responsibilities: Reviewed I2C specifications, developed test plans, executed test cases.

Achievements: Validated START, STOP, ACK, NACK conditions, WRITE and READ operations, and clock stretching.

Education

Kalasalingam Academy of Research and Education

ELECTRONICS AND COMMUNICATION ENGINEERING - Bachelor of Technology

2017 - 2021

CGPA: 7.4

Skills

  • Programming Languages: C, Embedded C, Assembly Language Low-speed Protocols: UART, I2C, SPI High-speed Protocols: EMMC, SD Host Operating Systems: Windows, Linux IDE/Tools: Keil µVision, GNU Tools: GC